The Wins2021-06-10T15:14:29+00:00

We build IP for transformative DisplayPort solutions for industry leaders.

Automotive. Consumer goods. Security.
Medical. Military. Test equipment.

Consumer applications

Smartphones. Tablet PCs. Portable media players. Home theater systems. Set-top boxes. Gaming devices. Digital televisions.

Professional markets

Large touchscreens. Video servers. Video walls. Kiosks.

Automotive markets

Whole car video systems. Integrated navigation devices. Advanced driver assistance systems. Entertainment. Integrated navigation. Vehicle information systems.

Future-proofing is fiction. Reliable, resilient, complete-featured code is Trilinear.
That’s why you find our IP solutions everywhere.

The Wins



How do you help a venerable, European automotive manufacturer significantly improve the quality of their design while shortening the overall schedule by three months?

Develop a complete sub-system solution including ISO-26262 compliant hardware and software for DisplayPort 1.4, DSC 1.2, HDCP 1.4/2.2, and Forward Error Correction in both transmitter and receiver implementations. That’s what happens when you pair a team of experienced design engineers with a stable of proven technology. That’s Trilinear.



What happens when, late into the design process, you realize that your DisplayPort IP provider has no integrated solution for receiver side pixel clock recovery?

You call our engineering team and we deliver a complete design with a fully integrated customer PHY solution as well as a PLL-based clock recovery in just under three weeks. Easy.



You’re a large consumer electronics company and you need a fully featured DisplayPort Transmitter with integrated support for DP 1.4, eDP 1.4b and DSC 1.2 that can run at speed in both a 7nm ASIC process and an FPGA prototype.

We got you. Our complete solution for this demanding application, along with a set of supporting design tools and system software, significantly reduces the time to FPGA prototype approval and mass production.

Our VESA-compliant, proprietary cores give you the power to design product faster, shorten time-to-market, and reduce overall costs—all with cores that never fail, regardless of design requirements.


The Lab

Wins come from Innovation. Silicon-proven, mature IP doesn’t just happen. It takes an attitude of innovation, a willingness to fail, rigorous testing, and dedicated iteration. Like anything of value, building something right takes time. And time is exactly what The Lab is all about.

We’re teaming up with Avery Design Systems on new leading-edge DisplayPort IP solutions.


Semiconductor intellectual property (IP) providers Avery Design Systems, Inc. and Trilinear Technologies, Inc. have signed a partnership agreement to provide DisplayPort Interface IP products developed by Trilinear along with DisplayPort verification IP (VIP) products developed by Avery. “As the DisplayPort standard matures, the verification of DisplayPort systems is becoming critical to delivering first time silicon success and rapid time to market,” said Carl Ruggiero, chief executive officer at Trilinear Technologies, Inc. “Trilinear develops world class DisplayPort products, and are pleased ...

We’re adding display stream compression (DSC) encode and decode solutions to our IP portfolio.


Meet the newest members of its M-series video compression IP core family, the M25 DSC 1.2 Decoder and M27 DSC 1.2 Encoder. With its high performance, low cost implementation, the Display Stream Compression encoder and decoder cores can be integrated into System-on-Chips (SoCs) or FPGAs for a wide range of applications including consumer electronics, professional video editing, broadcast, medical and surveillance applications. The Trilinear Technologies DSC encoder and decoder cores provide a balance of processing clock rate and resource usage ...

We’re advancing industry-leading DisplayPort transmitter and receiver link controllers.


Continuing the highly successful line of DisplayPort link controller cores, the Trilinear VF-111T DisplayPort Transmitter and VF-117R DisplayPort Receiver cores have been updated to include full support for the Video Electronic Standards Association (VESA) DisplayPort 1.4 standard. The fifth generation cores are available for implementation in FPGA or ASIC devices utilizing a variety of physical layer (PHY) interfaces available through third party partners. Both the Transmitter and Receiver are currently implemented for evaluation in multiple FPGA platforms. The fifth generation ...


Because “good” isn’t good enough, our experts are always in
The Lab designing what’s next in DisplayPort IP.

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