The Lab
Where “good” isn’t good enough.
Silicon-proven, mature IP doesn’t just happen. It takes an attitude of innovation, a willingness to fail, rigorous testing, and dedicated iteration. Like anything of value, building something right takes time. And time is exactly what The Lab is all about.
Delivering Next-Generation DisplayPort Controllers for Multiple FPGA and ASIC Tech
Our latest DisplayPort Transmitter and DisplayPort Receiver cores have been updated to include full support for the Video Electronic Standards Association (VESA) DisplayPort 1.3a standard and the Embedded DisplayPort 1.4 standard. With the latest round of improvements, Trilinear has added compliance with the latest VESA standards and support for multiple silicon PHY implementations available in process nodes from 55nm to 14nm. Both cores are currently implemented for evaluation in Xilinx FPGAs.
