About Barton White

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So far Barton White has created 7 blog entries.

PHY Integration: No Shortcuts, Stronger Results

2022-04-29T16:42:02+00:00Advancements|

No Shortcuts, Stronger Results PHY Integration is an essential process for any design and technology project. Setting it up right the first time is both the fastest and most efficient way you can be confident in your product long-term. We’ll tell you how we do it, how we ensure that it works, and how we’re the best people to get it done.     Step-by-Step Expertise   Common-sense principles of chip design tell us that the most recently developed portion of ...

We’re adding display stream compression (DSC) encode and decode solutions to our IP portfolio.

2020-12-18T18:30:49+00:00Growth|

Meet the newest members of its M-series video compression IP core family, the M25 DSC 1.2 Decoder and M27 DSC 1.2 Encoder. With its high performance, low cost implementation, the Display Stream Compression encoder and decoder cores can be integrated into System-on-Chips (SoCs) or FPGAs for a wide range of applications including consumer electronics, professional video editing, broadcast, medical and surveillance applications. The Trilinear Technologies DSC encoder and decoder cores provide a balance of processing clock rate and resource usage ...

We’re advancing industry-leading DisplayPort transmitter and receiver link controllers.

2020-12-18T18:34:27+00:00Advancements|

Continuing the highly successful line of DisplayPort link controller cores, the Trilinear VF-111T DisplayPort Transmitter and VF-117R DisplayPort Receiver cores have been updated to include full support for the Video Electronic Standards Association (VESA) DisplayPort 1.4 standard. The fifth generation cores are available for implementation in FPGA or ASIC devices utilizing a variety of physical layer (PHY) interfaces available through third party partners. Both the Transmitter and Receiver are currently implemented for evaluation in multiple FPGA platforms. The fifth generation ...

We’re delivering next-generation DisplayPort controllers for multiple FPGA and ASIC tech.

2020-12-18T18:34:54+00:00Product Launch|

Big stuff! Our VF-111T DisplayPort Transmitter and VF-117R DisplayPort Receiver cores have been updated to include full support for the Video Electronic Standards Association (VESA) DisplayPort 1.3a standard and the Embedded DisplayPort 1.4 standard. With the latest round of improvements, Trilinear has added compliance with the latest VESA standards and support for multiple silicon PHY implementations available in process nodes from 55nm to 14nm. Both cores are currently implemented for evaluation in Xilinx FPGAs. The new generation of Trilinear DisplayPort ...

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