Introducing the Trilinear AVP-35


Trilinear Technologies Introduced Next Generation Interlaced Video Conversion Technology

New Technology Includes Spatial and Temporal Content Adaptive Processing
PORTLAND, Ore. – July 25, 2012 – Imaging and display intellectual property (IP) provider, Trilinear TechnologiesTM, Inc., announced the introduction of a new image processing core designed for the conversion of interlaced fields to progressive frames. The Trilinear AVP-35 Content Adaptive Deinterlacer core includes the next generation of Trilinear’s proprietary content adaptive processing technology which includes both spatial and temporal processing elements. The new core is available for production in both FPGA and ASIC technologies and is implemented for evaluation on Xilinx Virtex5, Virtex6, and Spartan 6 FPGAs.

The new Trilinear core includes proprietary content adaptive processing technology which performs different processing techniques based on the spatial and temporal characteristics of each input field. Including both linear and non-linear processing algorithms, the AVP-35 core provides state of the art image processing for the highest levels of image quality. The deinterlacing core supports color depths of 8, 10, and 12 bits per pixel with input formats of 480i, 576i and 1080i.

The Trilinear AVP-35 core ships with a complete Software Development Kit (SDK) featuring hardware drivers and a sample video player application. The optional Viper evaluation and development system includes a host processor and peripheral suite< controlled via the TRIMON ROM monitor. TRIMON is a full-featured monitor with a robust API that offers driver level access to the onboard hardware. Customer applications can be developed, downloaded and tested from within the TRIMON interface, allowing for simultaneous hardware and software evaluation efforts.

“We are excited to bring our proprietary content adaptive technology to the image processing product line. At Trilinear Technologies we are committed to providing our customers with high quality video solutions on both ASIC and FPGA platforms,” said Carl Ruggiero, CEO, Trilinear Technologies. “The Content Adaptive Deinterlacing core provides a high level of image quality for demanding customer applications when general purpose imaging cores just can’t compete.”

Availability and Pricing

The Trilinear AVP-35 Content Adaptive Deinterlacer core is is now available for customer shipment. The core ships with in various source code formats and comes with a complete SDK including a sample video player application. For more information about the product, its pricing, and how to purchase, go to

About Trilinear Technolgies, Inc. Trilinear Technologies Inc., headquartered in Portland, Ore. and privately funded, is a premier provider of high definition (HD) video hardware IP cores for ASIC implementation and FPGA prototyping. The company is targeting the broadcast, consumer display, medical, mobile devices, military, and security markets. Trilinear’s IP cores enable customers producing high quality chips to enjoy faster product design, shorter time-to-market, and overall cost reduction. The company sells its products through a network of distributors. For more information about the company and its products, please visit

Trilinear is a trademark of Trilinear Technologies, Inc. All other trademarks are the property of their respective owners